| 摘要 |
PURPOSE:To input correctly digital data in a digital signal by outputting as a synchronizing signal detecting signal an output of a counter which is reset, when a synchronizing signal detecting output is obtained continuously plural times. CONSTITUTION:The first counter 8 which is reset by an output signal of the first detecting circuit 3 for detecting a signal of the same fixed pattern as a synchronizing signal in a digital signal, and also counts a clock signal extracted from the digital signal is provided. When a signal of a period which is almost equal to a signal period of one block obtained by decoding its counting output, and a detecting signal of the first detecting circuit 3 coincide continuously N times as every signal period of one block, the second counter 15 is reset by an output detecting signal of the first detecting circuit 3. Even if a data of the same fixed pattern as the synchronizing signal exists in data except the synchronizing signal, a synchro nizing signal detecting signal whose phase is synchronized with a reproducing synchronizing signal can be outputted from a counting output of the second counter for counting a clock signal, without being effected by the existence of said data. |
