PARALLEL PICTURE PROCESSOR

摘要

PURPOSE:To expand easily a local picture area with no external circuit nor complicated control by providing an output port in order to use the delayed picture data to the input picture data of another basic module. CONSTITUTION:A line buffer 20-0 of a basic module 10 delays the picture data supplied from an input picture 1 by a time equivalent to a line of the raster scan. A selector 70 selects the picture data given from a picture data input port 54 as well as the outputs of line buffers 20-0 and 20-1. The output of a picture data output port 55 is turned into the input picture data of a basic module of the next stage. A variable stage number shift register (VSR)31-0 performs a shift operation and a selector 33-0 selects the outputs of the buffer 20-0 and the VSR31-0 and delivers them to a shift register VSR31-1. An integrating circuit 40 integrates the arithmetic data given from another basic module supplied from an arithmetic data input port 64 and the output of a parallel arithmetic part 30 and stores them in an output picture 2 through an arithmetic data output port 65.