发明名称 DIVERSION BUS DECISION SYSTEM FOR MULTIPROCESSOR SYSTEM
摘要 A computer system has a plurality of processors sharing a bus. Bus arbitration circuitry is located on each processor for determining bus access. The identity of the processor which is responsible for arbitrating bus access changes from time to time. Each processor has a plurality of possible arbitration states, which are controllable through execution of software by the processor.
申请公布号 JPS622345(A) 申请公布日期 1987.01.08
申请号 JP19860099322 申请日期 1986.04.28
申请人 TEXAS INSTR INC <TI> 发明人 JIEEMUSU ESU MARIN
分类号 G06F15/16;G06F13/37;G06F15/177 主分类号 G06F15/16
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