发明名称 |
SYNCHRONIZATION DETECTING CIRCUIT ON DIGITAL SIGNAL TRANSMISSION |
摘要 |
PURPOSE:To shorten the detecting time for synchronization and to prevent the actuation of a muting circuit for a short time, by outputting the synchronization detecting signal through a time constant circuit. CONSTITUTION:The reproduction digital signal synthesized with a block unit is supplied to an input terminal 1 of a synchronizing signal detecting circuit 11. Then a signal having approximately equal cycle to the signal cycle of a block synchronized in phase with the synchronizing signal in a digital signal is applied to a shift register 12 from the circuit 11. The register 12 shifts successively the received detection signals and supplies them to a gate circuit 14. The circuit 14 produces a detection signal of logic 1 only when the N-bit parallel output of the register 12 is continuously coincident by N times for each block transmission cycle and supplies the detection signal to a time constant circuit 15. The circuit produces a signal which is set at logic 1 when an extremely fixed short time elapses from a time point when the input signal is set at logic 1 and then set at logic 0 when a fixed time elapses after the time point when the input signal is set at logic 0 in the form of a synchronizing signal. This synchronizing signal is outputted through a terminal 16. |
申请公布号 |
JPS59221048(A) |
申请公布日期 |
1984.12.12 |
申请号 |
JP19830095338 |
申请日期 |
1983.05.30 |
申请人 |
NIPPON VICTOR KK |
发明人 |
UENO SHIYOUJI;NISHIKAWA KAZUNORI;IWASAKI YOSHIKI;MASUDA ISAO;FURUMURA MAKOTO |
分类号 |
G11B20/10;H04L7/04;H04L7/08 |
主分类号 |
G11B20/10 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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