| 摘要 |
PURPOSE:To increase the supply current while reducing the wiring width and shorten the length of a bonding wire to a pad by a method wherein a wiring layer is put in a double layer structure and kept surrounded with an insulation film, when the wiring layer and the bonding pad are provided on a semiconductor substrate with an element region formed therein. CONSTITUTION:A field oxide film 22 is adhered on the Si substrate 21 provided with the element region, where the wiring layer 23 of the lower layer 23 is first formed and surrounded with the insulation film 24. Next, the wiring layer 26p of the upper layer is provided by lamination at the aperture 25 on the wiring layer 23, thus generating parallel current paths. At the same time, at a distance therefrom, the bonding pad 26b is formed by being positioned on the film 24. Thereafter, the entire surface is covered with a passivation film 27, and an aperture 28 is bored above the pad 26b. Such a manner enables to narrow the width of the wiring through which a large current is passed, resulting in the miniaturization of the chip. When wires are connected to the pad 26, they do not come to direct contact with the layer 26p even by reducing the length thereof. |
