| 摘要 |
PURPOSE:To eliminate the need to supply a freeze signal, and synchronize save information easily by providing a freeze control circuit, etc., and freezing save timing at only one place to freeze all save information. CONSTITUTION:A logical unit 2 consists of a general register 7, stand-by register 8, AND gate 9, buffer gate 41, freeze control circuit 12 which designates freezing of information at the time of trouble occurrence, etc. If trouble occurs, the freeze signal 21 from the circuit 12 rises before the final timing of one microinstruction. When the signal 21 is sent out and a saving designation signal 31 is cut off of AND by the AND gate 9. Therefore, none of signals 33, 30, and 32 is outputted, so stand-by registers 5, 8, and 10 hold their last state. Thus, saving timing at only one place is frozen to free all saved information, and the need to supply the freeze signal is eliminated; and only one timing is used, so the saved information are synchronized easily. |
