发明名称 |
JIG AND TOOL FOR TESTING SEMICONDUCTOR, SEMICONDUCTOR TEST SYSTEM, AND SEMICONDUCTOR TEST METHOD |
摘要 |
PROBLEM TO BE SOLVED: To prevent data processing from performing overhead operation in a test of a semiconductor device without providing a test result memory in a semiconductor test device. SOLUTION: In a semiconductor test system testing a semiconductor device 1 having a self-diagnosis circuit 5 performing relief analysis of a memory circuit 4 by performing self-diagnosis of the incorporated memory circuit 4, the system is provided with a jig and tool 2 for testing a semiconductor connecting electrically the semiconductor device 1 and a semiconductor test device 3, and a non-volatile memory 9A for taking in and holding test result data outputted from the self-diagnosis circuit 5.
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申请公布号 |
JP2002157897(A) |
申请公布日期 |
2002.05.31 |
申请号 |
JP20000349088 |
申请日期 |
2000.11.16 |
申请人 |
MITSUBISHI ELECTRIC CORP |
发明人 |
SHIBAYAMA MARI;OMURA TAKASHI |
分类号 |
G01R31/28;G11C29/00;G11C29/10;G11C29/44;G11C29/56;H01L21/66;(IPC1-7):G11C29/00 |
主分类号 |
G01R31/28 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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