| 摘要 |
PURPOSE:To realize a stable PLL circuit without decreasing the response speed against phase fluctuation by fixing a signal advancing the phase so as to control a signal delaying the phase. CONSTITUTION:A phase advance circuit 7 is triggered by an input signal Fi to feed a pulse Fi' having a prescribed pulse width Ti to a charge pump as a signal advancing the phase of an output signal F0, a phase lag circuit 8 compares the phase of the input signal Fi with that of the output signal F0 of an RLL circuit to feed the result to the charge pump as a signal delaying the phase of the output signal F0. Thus the charge pump conducts the operation repeating the transmission and absorption of electric charges at all times and responds instantly when there is a phase shift between the input signal Fi and the output signal F0. The charge pump keeps operation even at the synchronism, neither the response to the phase shift is unsharpened nor the response speed of a control voltage by it is lowered. |
