| 摘要 |
A dot matrix print head control circuit is capable of selectively requesting and receiving a predetermined set of print head control data from a digital data processor which successively transmits plural sets of such digital data and corresponding data acknowledge pulses in response to a data request signal. The microprocessor is thus enabled to independently control two print wire arrays in a dot matrix print head using identical circuits which are thus more economically formed as LSI chips. Each such identical print head control circuit has a "role determining" circuit which can be initialized such that its associated print head control circuit, although identically constructed, is capable of selecting a predetermined set (e.g. byte) of digital data from among the plural sets (e.g. bytes) of digital data transmitted in succession by the microprocessor. The identical print head control circuits are thus capable of effecting different print functions in response to the selectively received data set.
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