发明名称 MOS TYPE SEMICONDUCTOR DEVICE AND MANUFACTURE THEREOF
摘要 PURPOSE:To provide N channel and P channel with narrow gaps preventing latch up phenomenon while facilitating high integration by a method wherein groove type recessions with depth reaching substrate are formed at the boundary between an N well region and a P well region while the recessions are provided with polysilicon layers. CONSTITUTION:Sidewall groove type recessions 20 are formed selfmatchingly by means of RIE process utilizing the first SiO2 film 15 and the second SiO2 film 19 as masks. Firstly SiO2 is grown on the overall surface and after forming SiN on the overall surface of the SiO2 film by means of low pressure CVD process, the third light oxide film 21 and the third SiN film 22 comprising SiO2 only are formed on the sidewall only of the groove type recessions 20 by means of RIE process of SiO2, SiN films. Secondly a P<-> type layer 23 of a well for N channel and an N<-> layer 24 of a well for P channel may be respectively formed simultaneously forming the third SiO2 film 25 on the N<-> layer 24 by means of diffusing this N-Si substrate 11 in the atmosphere mixed with N2 and O2 further boron doped P<-> layer 13 and phophorus doped N<-> layer 18 at relatively high temperature for a long time.
申请公布号 JPS59219938(A) 申请公布日期 1984.12.11
申请号 JP19830094002 申请日期 1983.05.30
申请人 HITACHI SEISAKUSHO KK 发明人 AZUMA TAKASHI
分类号 H01L27/08;H01L21/76;H01L21/764;H01L29/78;(IPC1-7):H01L21/76 主分类号 H01L27/08
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