Enhanced mobility NMOS and PMOS transistors using strained Si/SiGe layers on silicon-on-insulator substrates

摘要

The present invention comprises a thin Si/SiGe stack on top of an equally thin top Si layer of a SOI substrate. The SiGe layer is compressively strained but partially relaxed and the Si layers are each tensily strained, without high dislocation densities. The silicon layer of the SOI substrate has a thickness of approximately 10 to 40 nm. The SiGe layer has a thickness of approximately 5 to 50 nm. The top, second Si layer has a thickness of approximately 2 to 50 nm. Part of the top Si layer may be thermally oxidized to form a gate dielectric for MOS applications.