发明名称 BUFFER MEMORY
摘要 PURPOSE:To increase the access speed by performing an address array reading operation at a high speed for a buffer memory of a set associative system. CONSTITUTION:A data memory part 202 is connected to a latest access row address array 200 which stores the addresses in a main memory of data on the latest access row for each column as well as the addresses in the part 202. A buffer memory of such constitution starts an access with use of the array 200 in parallel to the access carried out by a conventional device for the memory reference given from a central processor. If the memory reference is equal to the reference to the row that receives the latest access, the data is obtained at a high speed from the access using the array 200. Thus the data memory part is read directly from the array 200 to obtain data with most of the reference. This decreases the read-out time by an amount equal to the difference of the capacity between the array 200 and an address array.
申请公布号 JPS59218690(A) 申请公布日期 1984.12.08
申请号 JP19830092274 申请日期 1983.05.27
申请人 HITACHI SEISAKUSHO KK 发明人 SHIYOUNAI TOORU;TORII SHIYUNICHI;SHINTANI YOUICHI
分类号 G06F12/08;(IPC1-7):G11C9/06;G06F13/00 主分类号 G06F12/08
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