| 摘要 |
PURPOSE:To increase the threshold voltage and to obtain the bootstrap voltage higher than the power supply voltage by constituting an output circuit with a complementary circuit and at the same time supplying the bootstrap voltage to the gate of an output MOSFET at the power supply voltage side through a transmission gate MOSFET. CONSTITUTION:When delay signals phid and phid' are changed to the high and low levels respectively, the bootstrap voltage produced by the bootstrap capacity CB is transmitted to the gate of an MOSFETQ54 through an MOSFETQ56 since the FETQ56 is kept on. Thus the FETQ54 is turned off. When the bootstrap voltage is set at >=(VCC+2Vth), MOSFETQ52 and Q54 are turned on to flow the current in the direction opposite to the above-mentioned operation. Then the level of the bootstrap voltage is clamped at (VCC+2Vth). Therefore the output signal obtained from a node N2 at the juncture between the FETQ54 and Q55, i.e., the word line selection timing signal phix is turned into the timing signal which is boosted synchronously with the timing signal phid. |
