发明名称 MEMORY CONTROLLER
摘要 PURPOSE:To simplify the circuit constitution by judging that no nonvolatile memory is connected when the read-out date of contents of a nonvolatile memory are all set at an H or an L level to replace the read-out data with the initial setting data and having a normal action in the mode excepting the above- mentioned mode. CONSTITUTION:The system reset is applied to a memory control circuit 1 when a power supply is turned on and the data is read out of a nonvolatile memory 2 and fetched to the circuit 1. A pull-up resistance 3 fixes the input of the circuit 1 at an H level excepting the read-out mode of the memory data. If the memory is read when no memory 2 is connected, all memory contents are set at the H level while the memory data is read out since the input of the circuit 1 is fixed at the H level by the resistance 3. A memory data deciding circuit 1d jas ''llllll'' as the reference data and always compares the input data with said reference data. If no coinsidence is obtained from this comparison, the input data is delivered as it is to a D/A converting circuit 4. If the coincidence is obtained, the input data is replaced with the initial set value (''010000'',etc.) and delivered to the circuit 4.
申请公布号 JPS59218687(A) 申请公布日期 1984.12.08
申请号 JP19830092303 申请日期 1983.05.27
申请人 HITACHI SEISAKUSHO KK 发明人 ITAGAKI TSUGIO
分类号 G06F12/00;G11C7/00;H04N5/44;(IPC1-7):G11C7/00 主分类号 G06F12/00
代理机构 代理人
主权项
地址