| 摘要 |
<p>PURPOSE:To attain asynchronizingly data transfer and transmission by converting a binary logical data into a multilevel by means of a binary-multi value logical converting section and conducting the succeeding processing in terms of multilevel logic so as to decrease a data error rate without requiring a synchronizing clock. CONSTITUTION:In transferring or transmitting a seriall data, the binary-multilevel logical converting section 11 as a transmission converting circuit converts a data of binary logic into a multilevel by a circuit not requiring synchronizing clock. The succeeding operating processing, data transfer and data transmission or the like are conducted by multilevel logic. A control signal representing the section of data is inserted to a data signal in this case. Thus, the section of data is identified by the control signal passing through one signal line not by a synchronizing clock. The signal subject to operating processing, data transfer and transmission is inverted into binary logic by a multilevel-binary converting section 12 being a receiving demodulation circuit.</p> |
