发明名称 COMMON BUS TRANSFER CONTROL SYSTEM
摘要 <p>PURPOSE:To transmit simultaneously and individually information through plural processors by connecting these processors to plural peripheral devices by exclusive buses respectively and providing plural interfaces to each peripheral device together with use of a proper identification code. CONSTITUTION:Processors 1-1-1-n have their exclusive buses 2-1-2-n respectively, and each of these buses is connected to one of interfaces (71-11-71-n)- (71-m1-71-mn) of peripheral devices 32-1-32-m. Each processor transmits the information including a proper identification code of a corresponding peripheral device to each peripheral device via an exclusive bus. Then the processor executes the command received by a common transfer control part 81i of the peripheral device that discriminated its proper identification code and gives an answer. For instance, a processor 1-i transfers information with a peripheral device 32-j via bus 2i, an interface 71-ji and a common transfer control part 81-j. Thus it is possible to transmit simultaneously the information given via other routes.</p>
申请公布号 JPS59218533(A) 申请公布日期 1984.12.08
申请号 JP19830093525 申请日期 1983.05.27
申请人 FUJITSU KK 发明人 FUKUHARA KUNIO
分类号 G06F15/16;G06F3/00;G06F13/36;G06F15/17 主分类号 G06F15/16
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