| 摘要 |
PURPOSE:To increase the signal charge amount of a memory greatly without altering the structure of a cell nor using a high voltage higher than VDD as a word line signal by discharging a cell plate voltage with the word line signal, and recharging the cell plate within the time when a word line is driven selectively. CONSTITUTION:A cell plate voltage control circuit 13 includes an enhancement type p channel TR14a and an n channel TR14b of the same type. When the word line 5 selected by an X decoder 17 is driven by a word line driver 18, the rising of the terminal end 5b of the word line is delayed behind the rising of the driving terminal 5a of the word line 5, and the word line signal rises to discharge a cell plate 8 which is charged previously to the source voltage VDD. Then, the discharge of the cell plate corresponding to the waveform which delays the rising of the word line signal most is quickened. Further, the word line signal corresponding to a cell plate whose discharge is delayed rises fast and the transfer of a signal charge from the memory cell to a bit line 4 is performed at a high speed to compensate the delay of the word line signal. |
