发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PURPOSE:To allow a user to write or read additive information without increasing the number of terminals nor reducing the storage capacity of a main memory by adding the 2nd memory cell array stored with the additive information in addition to a memory cell array for practical use and using a gate which operates only at levels except that of TTL to obtain a multifunctional terminal. CONSTITUTION:The 2nd memory cell array 5 is stored with the additive information such as an identifying code, etc., and the 2nd X decoder is a decoder for the identifying code. A Y decoder 3 and an output circuit 4 are invariably activated when the 1st memory cell array 1 is activated and when the 2nd memory cell array 5 is activated. When a level other than the TTL level is inputted to a terminal Ai, the 2nd memory cell array is activated and the 2nd memory cell array is inactivated, and when the TT1 level is inputted, they are activated and inactivated reversely.
申请公布号 JPS59217293(A) 申请公布日期 1984.12.07
申请号 JP19830091775 申请日期 1983.05.25
申请人 NIPPON DENKI KK 发明人 SATOU HIROAKI
分类号 G11C16/02;G11C17/00 主分类号 G11C16/02
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