| 摘要 |
PURPOSE:To perform synchronism detection easily and save cost and space by clearing a 4-bit binary counter which measures pulse width with reproduced clock precision, and extracting the low-order three bits of the 4-bit binary counter through an AND gate when the low-order three bits are (1,1,1) and obtaining a synchronizing signal. CONSTITUTION:Reproduced data is inputted to a clock reproducing circuit 20 and pulses synchronizing with leading and trailing edges of pulses are generated from the reproduced data to generate a reproduced clock D. The reproduced data A and its delayed reproduced data B are passed through an EX-OR22 to generate a narrow pulse C synchronizing with the leading and trailing edges of the reproduced data A, thereby clearing the binary counter 23 for pulse width measurement with the pulse. Then, 1110 is obtained as outputs QA, QB, QC and QD of the binary counter 23 for pulse width measurement unless the next clear pulse C arrives for a period of eight pulses, so those QA, QB and QC are extracted through a 3-input AND gate 24 to obtain the synchronizing signal E. |
