发明名称 DIAGNOSING DEVICE FOR LOGICAL CIRCUIT
摘要 PURPOSE:To prevent an error due to variance in operation speed by setting the timing of sampling for comparison to two different points with regard to a device which compares a reference circuit and a logical circuit to be diagnosed with each other and conducts a test. CONSTITUTION:Signals from the reference circuit 2 and logical circuit 1 to be diagnosed are led to a memory circuit 6 and a selecting circuits 9 and 10 through receiver circuits 4 and 3 respectively. The selecting circuits 9 and 10 select the signals from the receiver circuits 4 and 3 and timing signals T1 and T2 with a selection signal S, and either of the diagnosed logical circuit output and reference circuit output is stored in a memory 5 at timing T1 pr T2. The outputs of the memory circuits 5 and 6 are compared with each other by a comparing circuit 7, and the comparison result is inputted to a processing part 8. The memory circuit 6 fetches a signal (a) at the timing T1 and the memory circuit 5 fetches the reference circuit signal (a) at the timing T2 with the selection signal S as shown in a time chart, so a dissidence signal (d) is outputted when the signal (a) varies with the timing signals T1 and T2.
申请公布号 JPS59216069(A) 申请公布日期 1984.12.06
申请号 JP19830090663 申请日期 1983.05.25
申请人 HITACHI SEISAKUSHO KK 发明人 IWAO HIDEKI
分类号 G01R31/28;G06F11/22;G06F11/273 主分类号 G01R31/28
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