| 摘要 |
PURPOSE:To inhibit leakage currents generated among element regions and a substrate, and to prevent a latch-up phenomenon by completely isolating the p type element region, in which an n channel MOSFET is formed, and the n type element region, in which a p channel MOSFET is shaped, from the substrate by a high impurity concentration layer. CONSTITUTION:The upper section of an n type Si substrate 11 is coated with an SiO2 film 12, a window 131 for diffusing a p type impurity and a window 132 for diffusing an n type impurity are bored, and these windows are coated alternately with masks and a p<+> type region 16 and an n<+> type region 17 are diffused and formed to the substrate 11. The surface boundary sections of these regions are coated with SiO2 films 18, recessed sections 201 and 202 are bored in the regions 16 and 17 through etching, and the recessed sections are each buried with n<-> type regions 21 while using residual regions 16' and 17' as underlays. Accordingly, the regions 16' and 17' positioned under the regions 21 are given the functions of guard rings, and an n channel MOSFET and a p channel MOSFET are formed to each region 21. |
