| 摘要 |
PURPOSE:To improve the response speed by sweeping a read address of an RAM in opposite direction as the sweeping at write so as to eliminate the fluctuation in a detected output at a changeover of slots. CONSTITUTION:A read address counter 103 consists of a down-counter activated by receiving slot signals S1-Sn of a slot signal generating circuit 101 and inputs a read control pulse CT2 sweeping the read address in opposite direction as the sweeping at write to the RAM2 through a switching device 104. Further, a preset signal fp presetting a write address when the signals S1-Sn are changed is inputted to the counter 103. Then, the read address of the RAM2 is swept conversely at write and the read address in synchronizing with the slot changeover and set to a write address at that point of time is read out from the waveform written just before by following the time axis in reverse direction.
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