| 摘要 |
PURPOSE:To enable to form a large scale integrated circuit device finished with valuation of the faculty and the characteristic together in one chip as it is by a method wherein a wiring region to be used as the installation region of wiring layers is provided between mutual chip corresponding regions. CONSTITUTION:Chip corresponding regions A, B already finished with affirmation of valuation are formed to be arranged in a semiconductor chip 1 interposing proper space 5 between them. Then space thereof is the wiring region of mutual wirings 6 between the regions A, B, and moreover a wiring region to be used for outside wirings 7 between bonding pads to be connected to the outside as lead terminals from an LSI after formed in one chip is also provided in the neighborhood of the periphery of the chip. Namely, the wirings 6 between the regions A, B are formed between corresponding bonding pads provided respectively to the regions A, B utilizing the region 5 by wiring layers manufactured according to the process of the regions A, B. Moreover, bonding pads 4 corresponding to the wirings 7 are laid out by the necessary number of pieces at the periphery of the chip 1, and the wirings 7 are formed between the bonding pads 2, 3 of the regions A, B and the pads 4. |
