| 摘要 |
PURPOSE:To detect the state of an input break correctly even when a clock signal extracting circuit states self-oscillation by usilizing a flip-flop circuit which inputs a receive input unipolar pulse signal and extracted from the receive signal. CONSTITUTION:When the signal input is normal, the unipolar signal 7 of the receive input is applied to an input terminal D of the flip-flop circuit 1 and the clock signal 9 extracted by the clock extracting circuit 2 is applied to an input terminal CLK, so that the input signal 7 is outputted as an output signal 10 from a terminal Q between one rise of the clock signal 9 applied to the terminal CLK to the ther rise. Some of it is branched to drive a time constant circuit 3. When, however, the signal input 7 is cut off, no signal input appears at the terminal D, so the outpt 10 from a terminal Q of the flip-flop circuit stops even if the clock signal extracting circuit 2 starts self-oscillation to generate the same signal as the clock signal at the terminal CLK. Therefore, the time constant circuit 3 does not operate and sends a signal input break detection signal 8. |
