| 摘要 |
PURPOSE:To eliminate effects by the capacitance of a gate bonding pad and the capacitance of a package by integrating a photodiode and a transistor while forming a gate resistor for the transistor on the same semiconductor substrate. CONSTITUTION:An N type InGaAs layer 2 is formed on a semi-insulating InP substrate, and a P type diffusion layer 3 in a P-I-N photodiode, a P type gate diffusion layer in a junction type FET and a gate resistor 12 as a SiCr evaporated film are shaped on the layer 2. The resistor 12 and the P type diffusion layer 3 are connected electrically by an electrode 13. According to such constitution, the capacitance of a package and the capacitance of a pad can be ignored because they are connected in parallel between a gate bias power supply and a source. |
