发明名称 PEAK DETECTOR
摘要 PURPOSE:To eliminate the outputting of a false peak voltage by providing a slope detection circuit for discriminating the leading edge and the tailing edge of a signal to be observed to reset a positive/negative peak holding circuit at a positive or negative peak point. CONSTITUTION:A slope detector 400 and a reset pulse generation means 401 are provided. Even when a positive peak holding circuit 103 is reset to a false voltage E6 at the time T4, the hold voltage is reset to a negative peak at the time T4' and the circuit 103 holds a normal peak voltage E9 at the time T6, hence not a false peak voltage. The negative peak holding circuit 104 does the same. Thus, no false voltage will be outputted for the sample holding 106.
申请公布号 JPS59214774(A) 申请公布日期 1984.12.04
申请号 JP19830085430 申请日期 1983.05.16
申请人 TAKEDA RIKEN KOGYO KK 发明人 NUKUI YOSHIHIRO
分类号 G01R19/04 主分类号 G01R19/04
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