Incrementing/decrementing circuit as for a FIR filter

摘要

A circuit for incrementing or decrementing a binary number is described. An M bit binary number is applied to M dynamic latch circuits. The latch output signals are applied to M logic units each comprising an exclusive OR, an exclusive NOR and one transistor. The transistors of the respective logic units are connected serially, with the transistor of the logic unit operating on the LSB of the binary number being further connected to a carry in or count signal. The exclusive OR is responsive to the carry in signal and the latched signal to increment/decrement or pass through the respective bit of the binary number. The exclusive NOR is responsive to an Up/Down signal and the latched signal for controlling the conduction state of the respective transistor thereby providing a carry in signal to the input of the next adjacent logic unit operating on the next more significant bit of the binary number.