发明名称 WIRINGS FORMING METHOD
摘要 PURPOSE:To prevent the operating speed of a semiconductor device of multilayer wiring structure by forming a high melting point metal layer contacted with the first wirings in a contacting hole, thereby reducing the contacting resistance between the first wirings and the second wirings. CONSTITUTION:An impurity region 2 is formed on the surface of a silicon substrate 1, the first insulating film 3 is formed, the first contacting hole 4 is opened, and the first aluminum wirings 5 are formed. The second insulating film 6 is formed, with a resist 7 as a mask the second contacting hole 8 is opened, and Mo layer 9 is formed. The resist 7 is removed, the layer 9 is allowed to remain only in the hole 8, and the second wirings 10 which are contacted with the layer 9 are formed. Even if the substrate is heated to improve the step coverage at the time of forming the second wirings, no aluminum oxidized film is formed on the surface of the first wirings, and the contacting resistance between the first wirings and the second wirings can be reduced.
申请公布号 JPS59211249(A) 申请公布日期 1984.11.30
申请号 JP19830086259 申请日期 1983.05.16
申请人 SANYO DENKI KK 发明人 TANASE KENJIROU
分类号 H01L21/768;H01L21/302;H01L21/3065 主分类号 H01L21/768
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