| 摘要 |
PURPOSE:To minimize the generation of higher harmonic distortion by connecting the 1st and the 2nd resistances to the common drain of plural FETs connected in parallel, grounding the common source of the FETs, and applying an input signal from the 1st resistance and a control signal to the common gate of the FETs. CONSTITUTION:The input signal ei is applied from the resistance 1 to lead an output signal e0 from an output terminal 3, and the control signal E is applied to the common gate of the FETs 4'-4<n> through a switch 5. Thus, the resistance RDS during the drain-source conduction of the FETs 4'-4<n> is reduced to approxmiate to RDSapprox.=1/hgm (h: number of FETs). The higher harmonic distortion delta generated at the output terminal 3 is represented as deltaapprox.=DELTARDS/R (DELTARDS: drain- source resistance variation with VDS), and the FETs are connected in parallel to reduce the higher harmonic distortion almost to 1/n. |
