发明名称 SIGNAL VOLTAGE BOOSTING CIRCUIT
摘要 PURPOSE:To accumulate sufficiently large memory charge in tne capacity that constitute a memory cell and reduce soft error due to signal to noise ratio or alpha particles by boosting voltage applied to the memory cell higher than an electric power source voltage utilizing electrostatic capacity that changes according to the state of voltage. CONSTITUTION:For instance, when a data line 4 turns to a high voltage side, a signal line 6 remains a precharged voltage, and a signal line 7 is discharged to the data line 5 through Q2 and becomes nearly 0V. A controlling signal phi1 (=Vcc) is applied, and signal lines 6, 8 are further boosted through gate capacities CA, CC. Boosted voltage of the signal line 8 makes voltage of the data line 4 VCC+DELTAVCC through Q3 that raised gate voltage in the signal line 6. That is, QC is provided, and the data line voltage is boosted above power source voltage by its gate capacity CC.
申请公布号 JPS59210593(A) 申请公布日期 1984.11.29
申请号 JP19840078393 申请日期 1984.04.20
申请人 HITACHI SEISAKUSHO KK 发明人 KAWAJIRI YOSHIKI;ETOU JIYUN;HORI RIYOUICHI;ITOU KIYOO
分类号 G11C11/409;G11C11/34;(IPC1-7):G11C11/34 主分类号 G11C11/409
代理机构 代理人
主权项
地址