| 摘要 |
PURPOSE:To stop with a logical address by stopping a comparison when a prescribed relation is satisfied between the logical address converted into a real address and the real address which gives an access to a main memory. CONSTITUTION:A channel logical address needed for a debug, etc. is set to a comparison address register 1 with the address of a main memory 5. The page part is converted into a real address by a DAT conversion mechanism 2 during designation of an input/output logical comparison mode, alteration of a load control instruction and execution of a load real address instruction respectively. Then a bit V in a CLCR30 is set at ''1''. The contents of the page part 4A and byte part 4B of an MSAR4 are compared with the contents of the CLCR30 as well as the contents of the byte part 1B of a CPAR1. These compared contents are delivered from comparators 6 and 7. Thus the comparison is stopped. |
