发明名称 BUS FAULT DIAGNOSING DEVICE
摘要 PURPOSE:To improve the reliability of a digital processor by diagnosing the faults of address and control buses as well as a data bus. CONSTITUTION:No diagnosis of fault is carried out when a changeover switch 21 is set at a position D. A signal having bits all set at high levels is sent to a control bus 9 from a CPU1 as a command to switch a changeover switch 21. As a result, the switch 21 is actuated to connect a data bus 7 and an address bus 8 which are set at a position A in the figure. Then the information of bit structure which is optionally selected from the CPU1 is sent to the bus 8. Then the information is looped back, and a parity check, etc. are given to the information sent back via the bus 7 to decide the presence or absence of a fault. If no fault is detected, it is decided that the bus 8 has no fault. While it is decided that the bus 8 has a fault if a fault is detected from the parity check.
申请公布号 JPS59211119(A) 申请公布日期 1984.11.29
申请号 JP19830086829 申请日期 1983.05.16
申请人 MITSUBISHI DENKI KK 发明人 SASAKI YOSHIHIKO
分类号 G06F13/00;G06F3/00 主分类号 G06F13/00
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