发明名称 |
Time switch in a time division switching network. |
摘要 |
<p>A time switch for a time division switch has a function to exchange time slots as well as functions of bit rate conversion and multiplexing or demultiplexing. A first stage time switch comprises a channel memory (112) capable of sequential writing and random reading and a converter (113) for converting a data read from the channel memory to a universal signal in accordance with a conversion mode designation. A final stage time switch comprises a channel memory (312) capable of random writing and sequential reading and a control circuit (313) for designating a write bit position of the channel memory in accordance with a write mode designation. An economic time switch having a high flexibility to a traffic variation among bearer signals is provided.</p> |
申请公布号 |
EP0126484(A2) |
申请公布日期 |
1984.11.28 |
申请号 |
EP19840105804 |
申请日期 |
1984.05.22 |
申请人 |
HITACHI, LTD. |
发明人 |
TAKEMURA, TETSUO;GOHARA, SHINOBU |
分类号 |
H04L12/52;H04Q11/06;(IPC1-7):04Q11/04 |
主分类号 |
H04L12/52 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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