发明名称 CONTROLLING METHOD OF POWER CONVERTER
摘要 PURPOSE:To enable to a high speed switching by producing one of upper and lower limit values by combining an allowable difference from the central value of the desired output and a timing pulse, and obtaining other limit value disposed at the symmetrical position on the basis of one of the limit values. CONSTITUTION:When switching elements TU, TY are turned ON, a current instruction arithmetic unit 11A adds the output of a timing pulse generator 2 and the output of a comparator 12 to the desired current value, and the upper limit of the set current value is produced. The comparator 12 compares the value of the actual current with upper limit of the set current value, and inverts the output when both coincide. A sample-holding circuit 24 stores the difference between the maximal value of the actual current value and the desired value. A current instruction arithmetic unit 11B produces the lower limit of the set current value. When switch elements TV, TX are turned ON, a switch 26 is shifted to the unit 11B side.
申请公布号 JPS59209076(A) 申请公布日期 1984.11.27
申请号 JP19830083912 申请日期 1983.05.13
申请人 FUJI DENKI SEIZO KK 发明人 ASAI ITARU
分类号 H02M7/48 主分类号 H02M7/48
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