发明名称 BUFFER CONTROL DEVICE
摘要 PURPOSE:To transmit a loading error of a buffer memory block to an I/O control device by detecting the loading error and setting an error display bit so that data before the detection of the error are guaranteed. CONSTITUTION:If an error display bit is detected when a storage device 100 is accessed by the I/O control device, error displat bit flags are set in all the buffer memory blocks. If an error has been detected at the load of A5 in the block 15 when C9 is to be loaded to the buffer memory block 17 or BB is to be loaded to the buffer memory block 16, error display bits are added to the BB and C9 respectively. I/O control devices 5-7 detect the mixture of defective data in the buffer memory blocks at the unloading of the A5, BB and C9 starts the operation of reprocessing.
申请公布号 JPS59208631(A) 申请公布日期 1984.11.27
申请号 JP19830083662 申请日期 1983.05.13
申请人 NIPPON DENKI KK 发明人 MAEDA KENICHI
分类号 G06F13/28;G06F3/00 主分类号 G06F13/28
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