发明名称 PILOT SIGNAL GENERATING CIRCUIT
摘要 PURPOSE:To reduce the number of required frequency dividers, which is 4 conventionally to 2 and make it possible to set the order of pilot signals to be recorded, by providing one frequency divider for each head in an 8mm. VTR and switching frequency division ratios of frequency dividers with a signal generated on a basis of a vertical synchronizing signal. CONSTITUTION:One frequency divider is connected to each of two heads and is so constituted that a frequency division ratio where two kinds of pilot signal to be recorded on every other tracks can be generated is selected. A conventional known circuit is used as a reference signal generating circuit 20. In the first frequency divider 30, FFs 60-64 are connected in 5 stages, and a reference signal is inputted from the reference signal generating circuit 20, and output signals of FFs 60, 62, 63, and 64 in the first, the third, the fourth, and the fifth stages and a Q output signal of an FF52 of a switch circuit 32 are inputted to an AND gate 65, and the output signal of the FF64 divides the frequency of the reference signal at 1/29 ratio. Similarly, in the second frequency divider, FFs 70-74 are connected in five stages, and the reference signal is inputted.
申请公布号 JPS59207019(A) 申请公布日期 1984.11.24
申请号 JP19830079953 申请日期 1983.05.07
申请人 RICOH KK 发明人 NARITA FUJIAKI
分类号 H04N5/7826;G11B5/588;G11B5/592;G11B15/467 主分类号 H04N5/7826
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