发明名称 |
Method for searching for potential faults in a layout of an integrated circuit |
摘要 |
A layout comprises a plurality of elemental areas which define the shape and arrangement of patterns of an integrated circuit. A method for searching for potential faults in the layout begins with dividing the layout into sections. One of a number of predetermined classes is allocated to a section by means of allocation criteria. An evaluation criterion allocated to the class which was allocated to the section is then applied to the section in order to obtain an evaluation result. Each section is then identified as potentially faulted in dependence on the evaluation result.
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申请公布号 |
US7484189(B2) |
申请公布日期 |
2009.01.27 |
申请号 |
US20060506201 |
申请日期 |
2006.08.18 |
申请人 |
QIMONDA AG |
发明人 |
HOFSAESS MARKUS;NASH EVA-MARIA |
分类号 |
G06F17/50;G01R21/00;G01R31/26;G01R31/317;G06F11/00;G06F19/00 |
主分类号 |
G06F17/50 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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