发明名称 MATCHING CIRCUIT OF ULTRASONIC FLAW DETECTOR
摘要 PURPOSE:To reduce the number of delay elements and to make adjustment easy by connecting output signals from variable delay elements to respective adders in series through a switch group and changes over the switch group in accordance with the required delay times of respective ultrasonic receiving signals. CONSTITUTION:In a matching circuit on the receiving side of an ultrasonic flaw detector deflecting, focusing and scanning ultrasonic beams, receiving signals inputted from ultrasonic transducers are connected to matrix switches S11-S34 through the respective parallel variable delay elements V1-V4 and buffer circuits B1-B4. The switches S11-S34 connect the circuits B1-B4 to respective adding points of common delay elements DL1-DL2 having adders DB1-DB3. Thus, the delay time can be optionally provided by change over the switches S11-S34 in accordance with respective required delay times of the ultrasonic receiving signals. Thus, the number of the delay elements can be reduced without the limitation of setting of the delay time, the adjustment can be made easy, the performance such as the accuracy of the delay time can be improved, and the size of the device can be reduced.
申请公布号 JPS59206759(A) 申请公布日期 1984.11.22
申请号 JP19830080744 申请日期 1983.05.11
申请人 HITACHI SEISAKUSHO KK;HITACHI ENGINEERING KK 发明人 OOTA YASUKI;SAITOU HIDETOSHI;HIRUOKA SHIYUUICHI;KUMASAKA KENJI;KUBOTA JIYUN
分类号 G01N29/04;G01N29/26 主分类号 G01N29/04
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