| 摘要 |
PURPOSE:To suppress considerably the generation of an inonization current by bringing a gate of an MOS transistor (TR) to a negative potential at the same time when an output terminal of an output circuit using a series connection of two MOS TRs as main components is at a high impedance state and a negative voltage is applied to this terminal in a semiconductor device incorporating a basic bias circuit. CONSTITUTION:The two MOSTRs Q1, Q2 are connected in series between VDD and VSS so as to form an output terminal 3. Further, a circuit bringing the output terminal 3 into high impedance is formed by a TRQ5 where its drain is connected to a gate 1 of the TRQ1, its source is connected to the output terminal 3 and a high impedance signal phi is given to a gate 4, and a TRQ4 where its drain is connected to a gate 2 of the TRQ2, its source is connected to the VSS, and the high impedance signal phi is given to the gate respectively. The TRs Q1, Q2 are enhancement TRs and since the TRQ2 is turned off when the high impedance signal phi is at a high potential and the TRQ1 is turned off because its source and gate is at the same potential thereby bringing the output terminal 3 to the high impedance state. When a negative potential is applied to the output terminal 3 in this case, since the TRQ5 is conductive, the potential of the gate 1 of the TRQ1 is equal to the potential of the output terminal 3 and becomes negative, and then the TRQ1 is not turned on. |
