发明名称 Oxide walled emitter
摘要 A semiconductor integrated circuit device in which the side surfaces of an emitter of an oxide isolated bipolar transistor are surrounded with insulating compounds or regions so that the capacitance between the emitter and base is lowered and a base is formed by the self-alignment so that the influence of an active base between an external base and the emitter can be made negligible. Thus the base resistance and parasitic capacitance are lowered.
申请公布号 US4484211(A) 申请公布日期 1984.11.20
申请号 US19830542555 申请日期 1983.10.17
申请人 MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. 发明人 TAKEMOTO, TOYOKI;FUJITA, TSUTOMU;SAKAI, HIROYUKI;YAMADA, HARUYASU
分类号 H01L29/06;H01L29/732;(IPC1-7):H01L27/04;H01L29/04;H01L29/72 主分类号 H01L29/06
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