发明名称 LIFT TESTER FOR INTEGRATED CIRCUIT
摘要 PURPOSE:To estimate the life of an integrated circuit such as ring oscillator economically and accurately by incorporating a simple added circuit containing a detection circuit, a voltage addition circuit and a recorder. CONSTITUTION:In detection circuits D to which outputs from (n) pieces of DUTs such as ring oscillator are inputted respectively, outputs of the DUTs applied to an input terminal 1 are provided to a half-wave rectification diode 6 only corresponding to an AC portion of the DUT outputs via HPF comprising a bias resistance 5 and a series capacitor 4. When the AC output of the DUTs is small, it is amplified with a preamplifier 2 containing a capacitor 2a and an amplifier 2b. The detection DC output 9 obtained across a smoothing capacitor 7 and a clamper diode 8 connected in parallel thereto after a half-wave rectification with the half-wave rectification diode 6 are clamped to a fixed diode built-in voltage with the clamper diode 8 and inputted into a voltage adder. Outputs of the respective DUTs applied to a voltage adder 11 are each a fixed value V0 and hence, the adder outputs is nV0.
申请公布号 JPS59204780(A) 申请公布日期 1984.11.20
申请号 JP19830080366 申请日期 1983.05.09
申请人 NIPPON DENKI KK 发明人 HIRAYAMA NOBUKI
分类号 G01R31/28;G01R31/26;G01R31/30;H01L21/326 主分类号 G01R31/28
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