SEMICONDUCTOR INTEGRATED CIRCUIT

摘要

PURPOSE:To release a latch-up instantaneously even on the generation of the latch-up, and to return the titled integrated circuit to normal logical operation by providing a current abnormality detecting means and a switching means interrupting a conduction path on the basis of an output from said detecting means. CONSTITUTION:A resistor R3 functioning as a current abnormality detecting means is inserted and connected between a CMOS inverter circuit 11 and a first potential supply source VDD, and an N channel type MOS transistor Q3 conducted and controlled at the potential of a node between said resistor R3 and a P channel type MOS transistor Q1 is connected between the CMOS inverter circuit 11 and a second potential supply source GND. The MOS transistor Q3 serves as a switching means interrupting a conduction path to the second potential supply source GND from the first potential supply source VDD on the state of a latch-up, and a capacitor C for removing switching noises at a node between the resistor R3 and the MOS transistor Q1 is inserted and connected between a gate in the MOS transistor Q3 and the second potential supply source GND.