发明名称 PRIORITY CONTROL CIRCUIT
摘要 PURPOSE:To load and unload an input/output controller IOC to/from a slot with no special treatment by providing a detecting circuit to detect the connection of te IOC and a control circuit to connect an input/output priority line to an idle slot in terms of signal logic. CONSTITUTION:For a priority control circuit of an IOC of an electronic computer system, no light reaches a phototransistor from a light emitting diode while an IOC3 is packaged. Thus the signal logics on 13a and 13c are set at H, and NAND gates 9a and 9c are set at a high impedance respectively. The control circuits 8a and 8c have no existence as long as it concerns priority lines 5 and 6. When no IOC is packaged, the signal logic on 13b is set at H. Then a control circuit 8b is set at the signal logic on a priority line where the signal logic on an input priority line is delivered.
申请公布号 JPS59202530(A) 申请公布日期 1984.11.16
申请号 JP19830078512 申请日期 1983.05.04
申请人 MITSUBISHI DENKI KK 发明人 SAITOU HIROSHI
分类号 G06F9/48;G06F3/00;G06F9/46;G06F13/37 主分类号 G06F9/48
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