发明名称 PROGRAM ANALYZER
摘要 PURPOSE:To obtain frequency distributing information of each function after an address accessed by a processor of an active machine is stored sequentially in a history memory only when the processor executes a desired part of a control program. CONSTITUTION:An address data inputted to a memory 22 via an A bus 24 from a CPU21 is applied to an address input of a bit map memory 5 via an MPX4. Then, the memory 5 is accessed by an identical address to the address of a program memory 22 accessed by an active machine 20 and its reading output is fed to the 1st write control terminal of a history memory 6 via an output terminal OUT. Further, a write timing pulse is fed to the 2nd write control terminal of the memory 5 from a control circuit 7. The history memory 5 stores an address data appearing on the A-bus 24 when both a bit map memory output and a write timing pulse are at level ''1''. The data stored in the memory 6 is fetched to a memory 9 by a CPU2, this is arranged to obtain the frequency distributing information of each function.
申请公布号 JPS59202553(A) 申请公布日期 1984.11.16
申请号 JP19830077537 申请日期 1983.05.04
申请人 TATEISHI DENKI KK 发明人 TAKAGI HARUO;TAKAHASHI YOSHINORI
分类号 G06F11/28;G06F11/36 主分类号 G06F11/28
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