发明名称 TRANSMISSION SYSTEM OF DIGITAL SIGNAL
摘要 PURPOSE:To suppress the output probability of the worst pattern to a level being not a problem practically at the least redundancy bit by transmitting a signal representing that scrambling is applied after being added to a digital signal. CONSTITUTION:A data signal from an input terminal 1 is applied to a memory 2 for one block's share and stored. Further, a data signal from the terminal 1 is applied to a circuit 3 for deciding the presence of necessity of scramble, where the presence of the necessity of scramble is decided. Further, a switch 4 is controlled switchingly by a signal from the deciding circuit 3 and the switch 4 is changed over to the position where the worst pattern is generated less depending that scramble is applied or not. Further, a signal of the switch 4 is applied to a mixer 7 through an NRZI converting circuit 6, a pilot bit is formed depending on the presence of scramble by a synchronizing pattern forming circuit 8, applied to the mixer 7 and outputted from a terminal 9.
申请公布号 JPS59201561(A) 申请公布日期 1984.11.15
申请号 JP19830075712 申请日期 1983.04.29
申请人 SONY KK 发明人 FUKUDA SHINICHI;ODAKA KENTAROU
分类号 H04L1/00;G11B20/12;H03M5/04;H04L25/03;H04L25/49 主分类号 H04L1/00
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