发明名称 INTEGRATED CIRCUIT PACKAGE PAD AND METHODS OF FORMING
摘要 A semiconductor device and a method for forming the semiconductor device are provided. The semiconductor device comprises an integrated circuit die. The integrated circuit die has through vias adjacent to the integrated circuit die. A molding compound is interposed between the integrated circuit die and the through vias. The through vias have a projection portion extending through a pattered layer. The through vias can be offset from a surface of the patterned layer. A recess can be formed by selectively removing a seed layer used to form the through vias. Therefore, an increased surface between solder and the through vias can increase reliability.
申请公布号 KR20160067022(A) 申请公布日期 2016.06.13
申请号 KR20150118047 申请日期 2015.08.21
申请人 TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD. 发明人 CHEN HSIEN WEI;YU CHEN HUA;WU CHI HSI;YEH DER CHYANG;SU AN JHIH;CHEN WEI YU
分类号 H01L25/07;H01L23/28;H01L23/48;H01L23/532;H01L25/065 主分类号 H01L25/07
代理机构 代理人
主权项
地址