发明名称 MEMORY DEVICE
摘要 PURPOSE:To prevent the malfunction of a system utilizing a memory device by providing a delaying circuit so that chip select information is delayed by a prescribed time, and thereafter, inputted to a data output control circuit. CONSTITUTION:A delaying circuit 12 is provided between a chip select input buffer circuit 8 and a data output controlling circuit 9. As a result, the time when a chip select information is inputted to the data output control circuit 9 can be matched with a delay time when memory information is outputted from a row selector 6. Accordingly, even if each new address information and chip select information are given simultaneously to an address input terminal 1 and a chip select input terminal 7 from a floating state of an output terminal, the memory information corresponding to the previous address information is not outputted, the memory information corresponding to the new address information is outputted to a data output terminal 11, and the malfunction of a system can be prevented.
申请公布号 JPS59201299(A) 申请公布日期 1984.11.14
申请号 JP19830075675 申请日期 1983.04.27
申请人 MITSUBISHI DENKI KK 发明人 HARADA TERUAKI
分类号 G11C29/00;G06F11/00;G11C7/00;G11C29/04 主分类号 G11C29/00
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