发明名称 SEQUENCE CONTROLLER
摘要 PURPOSE:To perform the sequence processing at a high speed by transmitting an address signal containing a signal component used to designate a memory area and a signal component used to designate no memory area to a memory when a subject is controlled with a program. CONSTITUTION:A memory circuit 102M allots memory areas every unit of information on a control subject, and a program storing circuit 102S stores a program which gives the sequence control to the control subject. A CPU101 transmits an address signal which contains a signal component used to designate a memory area and a signal component used to designate no memory area to the circuit 102M. Then the CPU101 performs the storage of information of a unit, the read processing, the arithmetic processing to the read information and the output processing to the memory area. Thus the word length of the corresponding instruction program, and the total word length is reduced.
申请公布号 JPS59201106(A) 申请公布日期 1984.11.14
申请号 JP19830076004 申请日期 1983.04.28
申请人 FUJI DENKI SEIZO KK 发明人 MIYATA TAKASHI;YAMADA SHIGEO
分类号 G05B19/05;G06F9/32;G06F9/44;G06F9/45 主分类号 G05B19/05
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