| 摘要 |
PURPOSE:To ensure high-speed decimal arithmetic processing even in a recomplement mode by carrying out a 2nd-1st operand operation in parallel to a 1st-end operand main operation. CONSTITUTION:Two operands to be calculated are stored in A-REG13 and B- REG14 respectively. Then the 1st operator 15 performs a 1st-2nd operand operation; while the 2nd operator 16 performs a 2nd-1st operand operation respectively. The results of these operations are fed to a selector 19 via C-REG17 and D- REG18, and the contents of either one of both registers are selected. That is, the contents of the REG17 are selected if the result of the operator 15 is positive; while the contents of the REG18 are selected if the result of the operator 15 is negative. This selected data is written to a main memory 11 to finish the operation for an arithmetic instruction. As a result, the decimal arithmetic processing is executed at a high speed with no deterioration of the processing performance even in a recomplement mode. |
