| 摘要 |
<p>PURPOSE:To attain an effective control system which sets and releases a stand- by mode to a peripheral device by providing an input terminal to the peripheral device for clock and system reset signals. CONSTITUTION:An input terminal is provided to a peripheral device which performs processing with a command of a host processor for clock and system reset signals. Then an external reset signal line 6, for example, is made active. As a result, the output of a double input OR circuit 16 of a control circuit 10 is made active. At the same time, the output of a double input NOR circuit 14 is made inactive. Then the output of a double AND circuit 13 is made inactive regardless of the state of a clock signal line 9 to prevent the clock signal from getting on a signal line 11. Thus no clock signal is supplied into a CMOS peripheral controller 2, and a stand-by mode is set. Then a selection signal line 7 and a write signal line 8 are made active. Thus the clock signal of the line 9 is supplied to the line 11, and the stand-by mode is released.</p> |
